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https://olympias.lib.uoi.gr/jspui/handle/123456789/39175Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kazantzidis, Panagiotis | en |
| dc.date.accessioned | 2025-07-08T07:00:55Z | - |
| dc.date.available | 2025-07-08T07:00:55Z | - |
| dc.identifier.uri | https://olympias.lib.uoi.gr/jspui/handle/123456789/39175 | - |
| dc.rights | Attribution 3.0 United States | * |
| dc.rights.uri | http://creativecommons.org/licenses/by/3.0/us/ | * |
| dc.subject | Approximate multiplier, Booth multipliers, Hardware Accelerated neural networks, Error tollerant neural networks | en |
| dc.title | Approximate computing using booth multipliers | en |
| dc.type | masterThesis | en |
| heal.type | masterThesis | el |
| heal.type.en | Master thesis | en |
| heal.type.el | Μεταπτυχιακή εργασία | el |
| heal.classification | Approximate booth multipliers | en |
| heal.dateAvailable | 2025-07-08T07:01:55Z | - |
| heal.language | en | el |
| heal.access | free | el |
| heal.recordProvider | Department of Computer Science & Engineering University of Ioannina | en |
| heal.publicationDate | 2025-06-30 | - |
| heal.abstract | In the present master thesis, we shall explore the design and implementation of an approximate Booth multiplier. The primary goal of this research is to investigate how approximate computing techniques can increase the efficiency of power intensive systems that are error tolerant. With the development of artificial intelligence and big data processing, an unprecedented problem has arisen. These new applications must process massive datasets using increasingly complex computing architectures, creating a critical demand for both energy-efficient systems and highly integrated circuitry. However, high-precision calculations are not always required. On the contrary, certain small errors can compensate for each other or do not significantly affect the result. Therefore, Approximate Computing (AC) has emerged as a new approach for an energy-efficient design, as well as for increasing the performance of a computing system, with limited loss of accuracy. Booth encoding is a well-established algorithm used to optimize binary multiplication by reducing the number of partial products generated and thereafter improving computational efficiency. By encoding the multiplier operand, Booth encoding enables the multiplier to handle multiple bits of the multiplicand simultaneously, thereby minimizing the number of operations required for multiplication. This reduction in operations translates to faster computation times, reduced hardware complexity, and lower power consumption, making the combination of Booth encoding with approximate computing an attractive choice for high-performance and error tolerant computing systems. Finally, the results of this thesis, demonstrate the effectiveness of the approximate Booth multiplier in improving efficiency. By strategically reducing bit precision, we achieved significant improvements in resource utilization, power efficiency, and processing speed, while remaining within acceptable error margins. These findings highlight the potential of approximate computing for designing efficient and high-performance systems, particularly in applications where minor errors are permissible. | en |
| heal.advisorName | Efthymiou, Aristides | en |
| heal.committeeMemberName | Tsiatouhas, Yiorgos | en |
| heal.committeeMemberName | Xrysovalantis, Kavousianos | en |
| heal.academicPublisher | Πανεπιστήμιο Ιωαννίνων. Πολυτεχνική Σχολή. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικής | el |
| heal.academicPublisherID | uoi | el |
| heal.numberOfPages | 66 | el |
| heal.fullTextAvailability | true | - |
| Appears in Collections: | Διατριβές Μεταπτυχιακής Έρευνας (Masters) - ΜΗΥΠ | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Approximate Computing using Booth Multipliers - Kazantzidis Panagiotis.pdf | 1.48 MB | Adobe PDF | View/Open |
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