Please use this identifier to cite or link to this item:
https://olympias.lib.uoi.gr/jspui/handle/123456789/26732| Title: | A flexible general - purpose parallelizing architecture for nested loops in reconfigurable platforms |
| Institution and School/Department of submitter: | Πανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Η/Υ & Πληροφορικής |
| Keywords: | Computer science |
| URI: | https://olympias.lib.uoi.gr/jspui/handle/123456789/26732 |
| Publisher: | Springer Berlin / Heidelberg |
| Book name: | Integrated circuit and system design. Power and timing modeling, optimization and simulation |
| Appears in Collections: | Μονογραφίες ( Κλειστές) |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| A flexible general - purpose parallelizing architecture for nested loops in reconfigurable platforms.pdf | 321.42 kB | Adobe PDF | View/Open Request a copy |
This item is licensed under a Creative Commons License
