Please use this identifier to cite or link to this item:
https://olympias.lib.uoi.gr/jspui/handle/123456789/11091| Title: | The Time Dilation Technique for Timing Error Tolerance |
| Institution and School/Department of submitter: | Πανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικής |
| Keywords: | Error Detection and Correction,B Hardware,B.6 Logic Design,B.6.2 Reliability and Testing,B Hardware,B.5 Register-Transfer-Level Implementation,B.5.3 Reliability and Testing,B Hardware,B.7 Integrated Circuits,B.7.3 Reliability and Testing,B Hardware,B.8 |
| URI: | https://olympias.lib.uoi.gr/jspui/handle/123456789/11091 |
| ISSN: | 0018-9340 |
| Appears in Collections: | Άρθρα σε επιστημονικά περιοδικά ( Ανοικτά) |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| kavousianos-2012-The Time Dilation Technique for Timing Error Tolerance.pdf | 442.31 kB | Adobe PDF | View/Open Request a copy |
This item is licensed under a Creative Commons License
