Please use this identifier to cite or link to this item: https://olympias.lib.uoi.gr/jspui/handle/123456789/11091
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dc.contributor.authorStefanos, Valadimasen
dc.contributor.authorAndreas Florosen
dc.contributor.authorYiorgos Tsiatouhasen
dc.contributor.authorXrysovalantis Kavousianosen
dc.date.accessioned2015-11-24T17:02:46Z-
dc.date.available2015-11-24T17:02:46Z-
dc.identifier.issn0018-9340-
dc.identifier.urihttps://olympias.lib.uoi.gr/jspui/handle/123456789/11091-
dc.rightsDefault Licence-
dc.subjectError Detection and Correction,B Hardware,B.6 Logic Design,B.6.2 Reliability and Testing,B Hardware,B.5 Register-Transfer-Level Implementation,B.5.3 Reliability and Testing,B Hardware,B.7 Integrated Circuits,B.7.3 Reliability and Testing,B Hardware,B.8en
dc.titleThe Time Dilation Technique for Timing Error Toleranceen
heal.typejournalArticle-
heal.type.enJournal articleen
heal.type.elΆρθρο Περιοδικούel
heal.accesscampus-
heal.recordProviderΠανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικήςel
heal.publicationDate2012-
heal.journalNameIEEE Transactions on Computersen
heal.journalTypepeer reviewed-
heal.fullTextAvailabilityTRUE-
Appears in Collections:Άρθρα σε επιστημονικά περιοδικά ( Ανοικτά)

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