Please use this identifier to cite or link to this item: https://olympias.lib.uoi.gr/jspui/handle/123456789/17106
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dc.contributor.authorRahman, M. S.en
dc.contributor.authorEvangelou, E. K.en
dc.contributor.authorAndroulidakis, I. I.en
dc.contributor.authorDimoulas, A.en
dc.contributor.authorMavrou, G.en
dc.contributor.authorGalata, S.en
dc.date.accessioned2015-11-24T18:35:32Z-
dc.date.available2015-11-24T18:35:32Z-
dc.identifier.issn0038-1101-
dc.identifier.urihttps://olympias.lib.uoi.gr/jspui/handle/123456789/17106-
dc.rightsDefault Licence-
dc.subjectcharge trappingen
dc.subjectdefects generationen
dc.subjectsilcen
dc.subjectrare-earth oxidesen
dc.subjectla(2)o(3)en
dc.subjectge substratesen
dc.subjectdielectric relaxationen
dc.subjectcvsen
dc.subjectinduced leakage currenten
dc.subjectelectron injectionen
dc.subjecttrap generationen
dc.subjectoxide-filmsen
dc.subjecttime-decayen
dc.subjectbreakdownen
dc.subjectstacksen
dc.subjecthfo2en
dc.subjectrelaxationen
dc.subjectinterfaceen
dc.titleSILC decay in La(2)O(3) gate dielectrics grown on Ge substrates subjected to constant voltage stressen
heal.typejournalArticle-
heal.type.enJournal articleen
heal.type.elΆρθρο Περιοδικούel
heal.identifier.primaryDOI 10.1016/j.sse.2010.04.023-
heal.identifier.secondary<Go to ISI>://000280322300025-
heal.identifier.secondaryhttp://ac.els-cdn.com/S0038110110001401/1-s2.0-S0038110110001401-main.pdf?_tid=8d8c326825565fdf4027f5c19c7807ce&acdnat=1334220064_8bf892907990f64279f3f34334850942-
heal.languageen-
heal.accesscampus-
heal.recordProviderΠανεπιστήμιο Ιωαννίνων. Σχολή Επιστημών και Τεχνολογιών. Τμήμα Βιολογικών Εφαρμογών και Τεχνολογιώνel
heal.publicationDate2010-
heal.abstractThe effect of constant voltage stress (CVS) on Pt/La(2)O(3)/n-Ge MOS devices biased at accumulation is investigated and reported. It is found that the stress induced leakage current (SILC) initially increases due to electron charge trapping on pre-existing bulk oxide defects. After 10 s approximately, a clear decay of SILC commences which follows a t(-n) power law, with n lying between 0.56 and 0.75. This decay of SILC is not changed or reversed when the stressing voltage stops for short time intervals. The effect is attributed to the creation of new positively charged defects in the oxide because of the applied stressing voltage, while other mechanism such as dielectric relaxation proposed in the past is proved insufficient to explain the experimental data. Also high frequency capacitance vs. gate voltage (C-V(g)) curves measured under different CVS conditions divulge the creation of defects and charge trapping characteristics of La(2)O(3) preciously. At low CVS exemplify the generation positively charged defects, however at higher CVS charge trapping obeys a model that was previously proposed and is a continuous distribution of traps. (C) 2010 Elsevier Ltd. All rights reserved.en
heal.journalNameSolid-State Electronicsen
heal.journalTypepeer reviewed-
heal.fullTextAvailabilityTRUE-
Appears in Collections:Άρθρα σε επιστημονικά περιοδικά ( Ανοικτά)

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