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Please use this identifier to cite or link to this item: https://olympias.lib.uoi.gr/jspui/handle/123456789/16256
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dc.contributor.authorMavrou, G.en
dc.contributor.authorGalata, S.en
dc.contributor.authorTsipas, P.en
dc.contributor.authorSotiropoulos, A.en
dc.contributor.authorPanayiotatos, Y.en
dc.contributor.authorDirnoulas, A.en
dc.contributor.authorEvangelou, E. K.en
dc.contributor.authorSeo, J. W.en
dc.contributor.authorDieker, C.en
dc.date.accessioned2015-11-24T18:29:23Z-
dc.date.available2015-11-24T18:29:23Z-
dc.identifier.issn0021-8979-
dc.identifier.urihttps://olympias.lib.uoi.gr/jspui/handle/123456789/16256-
dc.rightsDefault Licence-
dc.subjectge surface passivationen
dc.subjectbeam depositionen
dc.subjectmos dielectricsen
dc.subjectstacksen
dc.subjectcapacitorsen
dc.titleElectrical properties of La(2)O(3) and HfO(2)/La(2)O(3) gate dielectrics for germanium metal-oxide-semiconductor devicesen
heal.typejournalArticle-
heal.type.enJournal articleen
heal.type.elΆρθρο Περιοδικούel
heal.identifier.primaryDoi 10.1063/1.2827499-
heal.identifier.secondary<Go to ISI>://000252890700097-
heal.identifier.secondaryhttp://link.aip.org/getpdf/servlet/GetPDFServlet?filetype=pdf&id=JAPIAU000103000001014506000001-
heal.languageen-
heal.accesscampus-
heal.recordProviderΠανεπιστήμιο Ιωαννίνων. Σχολή Επιστημών και Τεχνολογιών. Τμήμα Βιολογικών Εφαρμογών και Τεχνολογιώνel
heal.publicationDate2008-
heal.abstractGermanium metal-insulator-semiconductor capacitors with La(2)O(3) dielectrics deposited at high temperature or subjected to post deposition annealing show good electrical characteristics, especially low density of interface states D(it) in the 10(11) eV(-1) cm(-2) range, which is an indication of good passivating proper-ties. However, the K value is estimated to be only about 9, while there is no,evidence for an interfacial layer. This is explained in terms of a spontaneous and strong reaction between La(2)O(3) and Ge substrate to form a low K and leaky La-Ge-O germanate over the entire film thickness, which, however, raises concerns about gate scalability. Combining a thin (similar to 1 nm) La(2)O(3) layer with thickef HfO(2) degrades the electrical characteristics, including Dit, but improves gate leakage and equivalent oxide thickness, indicating a better potential for scaling. Identifying suitable gate dielectric stack which combines good passivating/interfacial properties with good scalability remains a challenge. (c) 2008 American Institute of Physics.en
heal.journalNameJournal of Applied Physicsen
heal.journalTypepeer reviewed-
heal.fullTextAvailabilityTRUE-
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