Please use this identifier to cite or link to this item: https://olympias.lib.uoi.gr/jspui/handle/123456789/11036
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dc.contributor.authorDermentzoglou, L. E.en
dc.contributor.authorArapoyanni, A.en
dc.contributor.authorTsiatouhas, Y.en
dc.date.accessioned2015-11-24T17:02:17Z-
dc.date.available2015-11-24T17:02:17Z-
dc.identifier.issn1549-8328-
dc.identifier.urihttps://olympias.lib.uoi.gr/jspui/handle/123456789/11036-
dc.rightsDefault Licence-
dc.subjectbuilt-in-test (bit)en
dc.subjectdesign for testabilityen
dc.subjectlna testingen
dc.subjectrf testingen
dc.subjecttriple modular redundancyen
dc.subjectlow-cost testen
dc.subjectself-testen
dc.subjectanalogen
dc.titleA Built-In-Test Circuit for RF Differential Low Noise Amplifiersen
heal.typejournalArticle-
heal.type.enJournal articleen
heal.type.elΆρθρο Περιοδικούel
heal.identifier.primaryDoi 10.1109/Tcsi.2009.2035417-
heal.languageen-
heal.accesscampus-
heal.recordProviderΠανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικήςel
heal.publicationDate2010-
heal.abstractThis paper presents an efficient, low-cost, built-in test (BIT) circuit for radio frequency differential low noise amplifiers (DLNAs). The BIT circuit detects amplitude alterations at the outputs of the DLNA, due to parametric or catastrophic faults, and provides a single digital Pass/Fail indication signal. A triple modular redundancy approach has been adopted for the BIT circuit design to avoid possible yield loss in case of a malfunctioning test circuitry. The technique has been evaluated on a typical CMOS RF DLNA and simulation results are presented.en
heal.journalNameIeee Transactions on Circuits and Systems I-Regular Papersen
heal.journalTypepeer reviewed-
heal.fullTextAvailabilityTRUE-
Appears in Collections:Άρθρα σε επιστημονικά περιοδικά ( Ανοικτά)



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