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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kamoulakos, G. | en |
| dc.contributor.author | Tsiatouhas, Y. | en |
| dc.contributor.author | Chrisanthopoulos, A. | en |
| dc.contributor.author | Arapoyanni, A. | en |
| dc.date.accessioned | 2015-11-24T17:00:05Z | - |
| dc.date.available | 2015-11-24T17:00:05Z | - |
| dc.identifier.issn | 0018-9383 | - |
| dc.identifier.uri | https://olympias.lib.uoi.gr/jspui/handle/123456789/10705 | - |
| dc.rights | Default Licence | - |
| dc.subject | mos devices | en |
| dc.subject | random access memories | en |
| dc.subject | semiconductor device modeling | en |
| dc.subject | semiconductor devices | en |
| dc.subject | semiconductor memories | en |
| dc.title | A high-density DRAM cell with built-in gain stage | en |
| heal.type | journalArticle | - |
| heal.type.en | Journal article | en |
| heal.type.el | Άρθρο Περιοδικού | el |
| heal.language | en | - |
| heal.access | campus | - |
| heal.recordProvider | Πανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικής | el |
| heal.publicationDate | 2001 | - |
| heal.abstract | A high-density DRAM cell is proposed with a built-in vertical gain device topology. Due to the vertical built-in gain device, this cell exhibits increased reading speed, elongated refresh period, low-power oriented operation, and minor layout area penalty. | en |
| heal.journalName | Ieee Transactions on Electron Devices | en |
| heal.journalType | peer reviewed | - |
| heal.fullTextAvailability | TRUE | - |
| Appears in Collections: | Άρθρα σε επιστημονικά περιοδικά ( Ανοικτά) | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| tsiatouhas-2001-A high-density DRAM cell with built-in gain stage.pdf | 170.17 kB | Adobe PDF | View/Open Request a copy |
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