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Please use this identifier to cite or link to this item: https://olympias.lib.uoi.gr/jspui/handle/123456789/10746
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dc.contributor.authorTsiatouhas, Y.en
dc.contributor.authorMoisiadis, Y.en
dc.contributor.authorHaniotakis, T.en
dc.contributor.authorNikolos, D.en
dc.contributor.authorArapoyanni, A.en
dc.date.accessioned2015-11-24T17:00:19Z-
dc.date.available2015-11-24T17:00:19Z-
dc.identifier.issn0167-9260-
dc.identifier.urihttps://olympias.lib.uoi.gr/jspui/handle/123456789/10746-
dc.rightsDefault Licence-
dc.subjecti(ddq) testingen
dc.subjectcurrent monitoringen
dc.subjectdesign for testabilityen
dc.subjectsubmicron cmosen
dc.subjectcircuitsen
dc.subjectdesignen
dc.subjectfutureen
dc.subjectissuesen
dc.titleA new technique for I(DDQ) testing in nanometer technologiesen
heal.typejournalArticle-
heal.type.enJournal articleen
heal.type.elΆρθρο Περιοδικούel
heal.languageen-
heal.accesscampus-
heal.recordProviderΠανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικήςel
heal.publicationDate2002-
heal.abstractI(DDQ) testing has become a widely accepted defect detection technique in CMOS ICs. However, its effectiveness in very deep submicron technologies is threatened by the increased transistor leakage current. In this paper, we propose a technique for the elimination, during testing, of the normal leakage current from the sensing node of a circuit under test. In this way the already known in the open literature I(DDQ) sensing techniques can be applied in the nanometer technologies. (C) 2002 Elsevier Science B.V. All rights reserved.en
heal.journalNameIntegration-the Vlsi Journalen
heal.journalTypepeer reviewed-
heal.fullTextAvailabilityTRUE-
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